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Send Orders for Reprints to reprints@benthamscience.ae 166 The Open Electrical & Electronic Engineering Journal, 2016, 10, 166-180 The Open Electrical & Electronic Engineering Journal Content list available at: www.benthamopen.com/TOEEJ/ DOI: 10.2174/1874129001610010166 RESEARCH ARTICLE A DC Voltage Control Strategy for Active Power Filter Xudong Cao, Shaozhe Zhou, Jingze Li and Shaohua Zhang* Faculty of Geophysics and Information Engineering China University of Petroleum, Beijing, China Received: May 04, 2016 Revised: July 01, 2016 Accepted: July 15, 2016 Abstract: Active Power Filter (APF) is capable of changing the size and frequency of harmonics as well as changes in reactive power compensation. It is important to control the stability of the DC-link capacitor voltage stability for it. For DC voltage controls of APF, there are two important achievements. First, it is indicated that the control of DC voltage directly affects the compensation performance of APF. Second, the value of DC voltage influences the power loss of APF. This paper firstly introduces the design of the DC voltage controller. Then the relationship between DC voltage and the power loss as well as the compensation performance of APF is analyzed. Finally, a new control scheme with a droop controller is developed to regulate DC voltage. Keywords: Active Power Filter, DC-link voltage, Insulated gate bipolar transistors, Open-loop voltage, Sinusoidal pulse width modulation, Three-phase three-wire. 1. INTRODUCTION For an Active Power Filter (APF), it is important to control the stability of the DC-link capacitor voltage stability. As mentioned in [1 - 4], the premise condition for APF working normally is that the DC-link voltage should be greater than the line voltage peak, and the minimum DC-link voltage in the linear modulation range is given. In [1, 2] the influence of DC-link voltage reference value (the grid phase voltage RMS) on the compensation performance of APF is analysed, and the general control scheme selected for DC voltage is further proposed in [5, 6]. Two important results related to DC voltage control of APF have been gotten [7 - 9]. First, it is indicated that the control of DC voltage directly affects the compensation performance of APF. Second, the value of DC voltage influences the power loss of APF. Taken the three-phase three-wire APF as an example, this paper firstly introduces the design of the DC voltage controller [10 - 13]. Then the relationship between DC voltage and the power loss as well as the compensation performance of APF is analysed [14, 15]. Finally, a new control scheme with a droop controller is developed to regulate DC voltage [16]. 2. THE DC SIDE VOLTAGE CONTROL OF APF Fig. (1) shows the control scheme of three-phase three-wire APF. Here, Udc_ref is the reference value of DC voltage, Udc is the sampling value, Idcd is a regulating signal that is the difference between Udc_ref and Udc through voltage regulator. And idcd is added to the d-axis component of the output current reference. In fact, the d-axis DC component idcd, which represents the fundamental frequency components of the active currents, causes the real power exchange between AC and DC side. Before designing the voltage controller, the conversion factors from AC input current id`iq to DC output current idcd must be known. According to the mathematical model of APF, it has idc=1.5(Sdid+Sqiq). Here, the relationship between * Address correspondence to this author at the Faculty of Geophysics and Information Engineering China University of Petroleum, Beijing, China; Tel: 86 13391890051; E-mail: caoxudong0707@163.com 1874-1290/16 2016 Bentham Open A DC Voltage Control Strategy The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 167 AC and DC current is time-varying because of two variables Sd and Sq. To simplify the process and design it with thelinear method, it is believed that iq has completed the transient process reaching to 0 before a large change on the DC voltage, in which the value of iq equals 0 in steady state, and iq changes slightly in a dynamic process due to the current closed-loop. Based on this, the d-axis block diagram of the voltage outer-loop control can be seen in Fig. (2) ifd ifq ila ilb ilc idr Harmonic i qr Detection Algorithm idcd Udc_ref Udc Udr Uqr SVPWM Current regulator Usd Usq Current regulator Fig. (1). The control scheme of three-phase three-wire APF. U*dc + − Outer loop voltage controller idcd id idc Sd Udc Fig. (2). Axis block diagram of the voltage. Where Gc(s) is the closed-loop transfer function of inner current, Tvf means the delay time constant of voltage feedback path (switching frequency is 9600Hz, or delay time is 104 us). Kvf means the amplification factor of the voltage feedback path (taking 1). Kif means the sampling coefficient of the output current (taking 16.384), and the capacitor C takes 20 mF. Due to the second-order of the transfer function of current closed-loop Gc(s), it is better to lower the order of Gc(s) so as to make the synthesis of the voltage loop easier. The process is shown as follows: The transfer function of the inner current control loop is: Gc ( s ) = (1) 1 2TsfS + 1 The open-loop transfer function without the controller is: Gv ( s ) = Kif Kvf 3 * * Sd * 2TsfS + 1 TvfS + 1 2CS (2) Because Tvf and Tsf are time constant, so equation (2) can be simplified as bellow: 1.5 KifKvfSd / C S (TvS + 1) = Tv 2Tsf + Tvf Gvc ( s ) =      (3) 168 The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 Cao et al. The transfer function of PI controller is: Gpi ( s ) = K vi (τ v S + 1) S (4) Thus, the open-loop transfer function with PI controller is: K (τ vS + 1)   S 2 (TvS + 1)  K=1.5 KviKifKvfS d/ C   (5) GVe ( s ) = From the analysis above, it can be seen that equation (5) is a typical type II system, the controller parameters can be designed according to Oscillation index method. The key point of the Oscillation index method is to select parameters according to the practical engineering requirements for the closed-loop relative resonance peak. Based on this, it can be ensured the system performance index does not exceed a specified value, i.e. the maximum overshoot is not greater than a certain limit value, the corresponding phase margin is the biggest, and the amplitude margin is the best, also the adjusting time is the shortest. Fig. (3) shows the Bode diagram of the open-loop voltage with PI controller. -40db h -20db ω ωc ω1=1/τv ω2=1/Tv -40db Fig. (3). Bode diagram of the open-loop voltage with PI controller. From the Bode diagram in Fig. (3), a best fit between the two parameters can be found based on the minimum peak norm of amplitude-frequency characteristics in Oscillation index method. When the closed-loop resonant peak Mr reaches to the minimum, the relationship of each variable is obtained as: Z2 Zc Zc Z1 Mr 2h h 1 h 1 2 h 1 h 1 ½ ° ° ° ¾ ° ° ° ¿ (6) The key to design the voltage loop is determining the bandwidth h. Practical experience shows that the width of medium-frequency h varies generally between 3 to 10. In addition, a larger h does no significant effects on decreasing Mr. When h=constant, it can be derived as:     1 1 + + h h 2  = = K ω= ω ω 1 c 1 2 2h 2Tv2   τ v= h =hTv w2 (7) A DC Voltage Control Strategy The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 169 So the parameters of the voltage controller can be gotten. Sd ⊂ [0, 3 / 3] h=5,K=693420,τ v = 0.0021 = Kvi 1466, = τ v 1.3*10−3 The PI controller of the voltage outer-loop is: Gpi ( s ) = 1.906 s + 1466 s (8) 3. THE INFLUENCE OF DC VOLTAGE ON POWER LOSS The power loss of APF mainly includes the following two aspects: the switching loss of PWM inverter and the output inductor hysteresis loss, copper loss, etc. The output current of APF is higher harmonics, and including some switching ripple current. In general, the switching frequency is much higher than that of the output current, so the output inductor hysteresis loss is mainly proportional to the size of the switching ripple current as well as the area surrounded by the magnetization curve of the magnetic material. When magnetic material with small magnetization curve area and high permeability, such as amorphous material, is selected, the output inductor hysteresis loss will be reduced to a relatively low percentage. However, switching loss of PWM inverter actually contains IGBT switching loss, the diode reverse recovery loss, and the conduction loss of IGBT as well as the diode. Furthermore, the IGBT conduction loss is proportional to the drop voltage and the flowing current, and the drop voltage increases with the flowing current. So it can be concluded that the conduction loss of IGBT increases as the APF output current rises. And this is also suitable to the diode conduction loss. The IGBT switching loss includes turn-on and turn-off loss, and both the two components increases with DC voltage in case of the constant flowing current and switching frequency. It does also apply to the diode reverse recovery loss. The main components of these losses mentioned above are IGBT switching loss and diode reverse recovery loss. With the constant switching frequency and output current, any increase/decrease in DC voltage causes a relative increase/decrease in the power loss of APF. In addition, due to the complexity of the switching loss simulation, the relationship between DC voltage and the power loss of APF will be verified depending on experiments. 4. THE INFLUENCE OF DC VOLTAGE ON COMPENSATION PRECISION Without considering the influence of current regulator and the error of harmonic extraction algorithm, the capability of compensating harmonic currents of nonlinear load is important to be considered in order to analyse the compensation performance of APF. Based upon the topology structure of APF and neglecting the inverter loss, according to equation (9), the output current of APF is relevant to the inductor drop voltage which can be easily obtained by a simple subtraction of the midpoint voltage of PWM inverter arms and the grid voltage.  di fa = U sa − U fa = U sa − SaU dc − U NO L dt   di fb = U sb − U fb = U sb − SbU dc − U NO L  dt  di fc = U sc − U fc = U sc − ScU dc − U NO L  dt (9) In order to quantitatively analyse further, assuming the system is symmetrical, Usm is the peak of the grid phase voltage, and ω is the power system angular velocity. And the three-phase source voltage can be defined as: 170 The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 usa = U sm cos (ωt ) Cao et al. (10) = usb U sm cos (ωt − 2π / 3) = usc U sm cos (ωt + 2π / 3) Suppose the load is the three-phase uncontrolled rectifier with LR connection. According to the characteristic of the nonlinear load, it only exists 6n±1 harmonic orders in the load current, where 6n+1 is the positive sequence component, and 6n-1 is the negative one. Without considering the influence of current regulator and the error of harmonic extraction algorithm, the APF output current and the PWM inverter output voltage can be established as bellow: i fa I f 1m cos (ωt + θ1 ) + ∑ I fkm cos ( kωt + θ k ) =  =k 6 n −1  + + ω θ I l t cos ∑ flm ( l)  =l 6 n +1  2π   i I cos  ωt + θ − 2π  + = 1  ∑ I fkm cos  kωt + θ k +   fb f 1m  3  =k 6 n −1 3     2π    + ∑ I flm cos  lωt + θl −  3   = + l n 6 1   2π  2π    = i fc I f 1m cos  ωt + θ1 +  + ∑ I fkm cos  kωt + θ k −  3 3     − 1 = k n 6   2π    + ∑ I flm cos  lωt + θl +  3   =l 6 n +1  u fa U f 1m cos (ωt + ϕ1 ) + ∑ U fkm cos ( kωt + ϕk ) =  =k 6 n −1  + U cos lωt + ϕ ( ∑ flm l)  =l 6 n +1  2π   u U cos  ωt + ϕ − 2π  + cos ω ϕ = + + U k t ∑ fb f 1 m 1 fkm k      3  =k 6 n−1 3     2π   cos ω ϕ + + − U l t ∑ flm l    3  =l 6 n +1   2π  2π    = u fc U f 1m cos  ωt + ϕ1 +  + ∑ U fkm cos  kωt + ϕk −  3  k =6 n−1 3     2π    + ∑ U flm cos  lωt + ϕl +  3  =l 6 n +1  (11) (12) Here, If1m is the peak of APF output fundamental current, Uf1m is the peak of PWM inverter output fundamental voltage, Ifkm and Iflm mean the peak of APF output the k-th and l-th harmonic currents respectively, Ufkm and Uflm represent the peak of PWM inverter output the k-th and l-th harmonic voltages respectively, θ and φ signify the initial phase angle of each order component. According to the definition of Park transform, a space vector synthesized by any three-phase variables xa`xb and xc can be illustrated mathematically as: 2π 2π  2  j −j  X =  xa + xb e 3 + xc e 3  3  (13) Then equations (4-1) can be transfer to equation (14):  di f   L = u f − us dt (14) A DC Voltage Control Strategy The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 171 Substitute equations (10) ` (11) ` (12) into equations (13) ` (14), we can get: jω LI f 1me j(ωt +θ1 ) − = U f 1me j(ωt +ϕ1 ) + ∑ jkω LI fkme − j ( kωt +θk ) 6 n −1 k= ∑U − j ( kωt +ϕk ) fkm 6 n −1 k= e + ∑ + jlω LI flme ( j lωt +θl ) (15) 6 n +1 l= ∑U j ( lωt +ϕl ) flm 6 n +1 l= e − U sme jωt Obviously, the real and the imaginary part are equal in both sides respectively, and it is true for any ωt. So equation (15) can be simplified as: ω LI f 1m = U f 1m − U sm , ϕ1 = 0, θ1 = −π / 2 (16) kω LI fkm= U fkm , ϕ= θk + π / 2 k (17) lω LI flm= U flm , ϕ= θl + π / 2 l (18) According to equations (16 - 18), the harmonics of APF output current depends on each harmonic of PWM inverter output voltage and the voltage of the power grid. Moreover, PWM inverter amplitude modulation ratio M is the ratio of the length of output voltage resultant vector Ufr and half of the average DC voltage Udc. M= U fr = U f 1me j(ωt +ϕ1 ) + 2U r U dc ∑U (19) − j ( kωt +ϕk ) fkm 6 n −1 k= e + ∑U j ( lωt +ϕl ) flm 6 n +1 l= e (20) Considering compensating the load in the worst case, the maximum value of Ufr can be expressed by equation (21). ∑U + ∑U + ∑ kω LI + ∑ lω LI U fr |max = U f 1m + = U sm + ω LI f 1m fkm k= 6 n −1 (21) flm l= 6 n +1 fkm k= 6 n −1 flm l= 6 n +1 The maximal Ufr is the biggest PWM inverter output voltage necessary to compensate harmonic currents of nonlinear load under the worst condition. As for PWM inverter, an APF must output the voltage vector exceeding the maximum, so as to completely compensate harmonic currents of nonlinear load. Based on the above analysis and combining equations (19) and (21), we can get: MU dc − U sm ≥ ω LI f 1m + ∑ kω LI fkm + ∑ lω LI flm 2 k= l= 6 n −1 6 n +1 U dc 2 ,M ≤ 1.1547 Ur ≤ = 3 3 (22) (23) Equation (23) indicates the linearity range of space vector modulation. Suppose that the amplitude modulation ratio M is constant and equals to or more than 1.1547during the operation of APF, then formula (22) can be transformed to: U ∆ ≥ ω LI f 1m + ∑ kω LI fkm k= 6 n −1 = U ∆ + ∑ lω LI flm l= 6 n +1 U dc − U sm 3 (24) (25) From the analysis of the above two equations, it can be concluded that: (1) UΔ determines the capacity of APF output harmonic current; (2) With the same harmonic current RMS, the higher the order of harmonics is, the bigger PWM inverter output 172 The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 Cao et al. harmonic voltage is required; (3) The influence on PWM inverter output harmonic voltage caused by the size of output inductor L is a factor to be considered when designing L. Here to analyse the influence of UΔ on the capability of APF output harmonic current. Assume that the designed output inductor L=0.3mH, the rated grid phase voltage RSM Usn=220V, and the nominal DC voltage Udcn=700V.Based on the above design conditions, the compensation performance of APF can be achieved to meet the requirements. If the grid voltage fluctuates in a range of 90%-110%, the capability of APF output harmonic current varies with the changed UΔ. As shown in Fig. (4), the vertical axis shows the peak of the maximum k-th harmonic current that APF can output with the corresponding grid voltage. When Us =220V, the peak of maximum 5-th harmonic current is 197.5A, and when Us=1.1Usn=242V, the peak one is 131.4A, and it is 263.6Awhen Us=0.9Usn=198V. Comparing the grid voltage 1.1Usn with Usn, the capacity of APF output the maximum 5-th harmonic current declines by almost 33.5%. There is a similar relationship for other harmonics. 300 250 X:220 Y: 197.5 Ifkm(A) 200 150 X:253 Y: 98.36 100 50 0 180 190 200 210 220 230 240 250 5th 7th 11th 13th 17th 19th 23th 25th 260 Us(V) Fig. (4). The capability of APF output harmonics when the grid voltage varies. In conclusion, without considering the impact of current regulator and the error of harmonic extraction process, UΔ will influence on the compensation performance of APF. In the linear modulation range and with the constant modulation ratio, increasing DC voltage can enhance the compensation performance of APF, while decreasing DC voltage can reduce the performance. Similarly, any increase/decrease in the grid voltage leads to a relative decrease/increase on the APF compensating performance. 5. OPTIMIZING DC VOLTAGE CONTROL BY ADOPTING THE DROOP REGULATOR 5.1. Design of the Droop Regulator In industrial fields, the line voltage generally has no sudden changes, while it tends to be on large fluctuation (range:90%-110%) over a long period of time. The designed DC voltage is bigger in the worst case of grid voltage when taking Us = 1.1Usn. A larger DC voltage can cause more power loss according to the analysis above. However, if the grid nominal voltage is used in the design of the DC voltage, it is likely that the compensation performance of APF cannot be ensured with the increase of the grid voltage. Assuming that at rated grid voltage, the compensation performance of APF can meet the expected requirement by using the designed DC voltage rating. A droop regulator can be designed to control DC voltage reference with the grid voltage fluctuating according to equation (25). Increasing DC voltage can enhance the compensation performance of APF with a higher grid voltage, while decreasing DC voltage can reduce the power loss of APF with a lower grid voltage. Thus, the integrative optimization of APF’s power loss and compensation performance is implemented. The droop regulator can be expressed by the following equations (26) and (27): A DC Voltage Control Strategy The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 173 (26) U 93V U ∆n = dcn − 2U sn = 3 = U dc _ ref (27) 3 (U ∆n + U sm ) On the basis of the grid voltage fluctuating in the range of ±10% (APF is no longer working if the grid voltage is out of this range), the droop regulator curve can be drowned according to the above two equations. As shown in Fig. (5), the range of DC voltage is 646V-754V. 760 X: 242 Y: 753.9 Udc ref(V) 740 720 700 680 660 X: 198 Y: 646.1 640 190 200 210 220 Us(V) 230 240 250 Fig. (5). Controlling DC voltage by the droop regulator. 300 250 X: 220 Y: 197.4 Ifkm(A) 200 X: 242 Y: 197.4 5th 7th 11th 13th 17th 19th 23th 25th 150 100 50 0 190 200 210 220 Us(V) 230 240 250 Fig. (6). The capability of APF output harmonics current when the grid voltage varies by using the droop regulator. Further, the influence on the capacity of APF output harmonic current caused by the grid voltage fluctuating after using the droop regulator is analysed. It is observed from Fig. (6) that the grid voltage fluctuating does not affect the capability of APF output harmonic current in comparison with no droop regulator. The control strategy of APF by using the droop regulator is shown in Fig. (7). 174 The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 ifa ifb abc/dq ifc ila ilb ilc ifd Harmonic Detection Algorithm Udc + wL ifq idr iqr PI Cao et al. wL + + + Current regulator + + + + + Udr Uqr SVPWM UsdUsq idcd Udc_ref Droop regulator abc/dq Usa UsbUsc Fig. (7). The control strategy of APF by using the droop regulator. 5.2. Simulation Analysis This section analyses the relationship among DC voltage`the grid voltage and the compensation performance through MATLAB-SIMULINK simulations. The harmonic source is the three-phase uncontrolled rectifier with resistive load, the RMS of power voltage rating is 380V, and DC voltage rating is 700V. The above analysis is verified under three working conditions. In Fig. (8), the grid voltage remains invariable, and the DC voltage reference is 646V in 0-0.4s, or 700V in 0.4-0.8s, or 754V in 0.8-1.2s. Usm(V) 350 300 250 0 0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2 Udc(V) 750 700 650 0 Is(A) 200 0 -200 0 t(s) Fig. (8). Waveforms of the grid phase voltage peak Usm`DC voltage Udc and the compensated source current Is in the first working condition. It can be seen from Fig. (9) that when maintaining the DC voltage constant, the grid voltage is 90% of the rating in 0-0.4s, 100% in 0.4-0.8s, and 110% in 0.8-1.2s. A DC Voltage Control Strategy The Open Electrical & Electronic Engineering Journal, 2016, Volume 10 175 Usm(V) 350 300 250 0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2 -200 0 0.2 0.4 0.6 0.8 1 1.2 Udc(V) 750 700 650 Is(A) 200 0 t(s) Fig. (9). Waveforms of the grid phase voltage peak Usm`DC voltage Udc and the compensated source current Is in the second working condition. Udc(V) Usm(V) As seen from Fig. (10), in case of using the droop regulator to control DC voltage, the grid voltage is 90% of the rating in 0-0.4s,100% in 0.4-0.8s, and110% in 0.8-1.2s. 350 300 250 0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2 750 700 650 Is(A) 200 0 -200 t(s) Fig. (10). Waveforms of the grid phase voltage peak Usm`DC voltage Udc and the compensated source current Is in the third working condition. According to the simulation results, the performance of APF system in different conditions is analysed as listed in Table 1. Us% means the ratio of the real value to the rating of the grid voltage, Il means the RMS of load current, and THDI is the total harmonic distortion of current. Table 1. The performance of APF system in three working conditions. Working conditions I Us% Udc/(V) Il/(A) THDI /% 100% 646 70.88 3.12 100% 700 70.88 2.78 100% 754 70.88 2.43